Tue, 27 Oct 2020 04:27:00 UTC

Information for RPM microcode_ctl-4:20180807a-2.el8.x86_64.rpm

ID10239
Namemicrocode_ctl
Version20180807a
Release2.el8
Epoch4
Archx86_64
SummaryCPU microcode updates for Intel x86 processors
DescriptionThis package provides microcode update files for Intel x86 and x86_64 CPUs. The microcode update is volatile and needs to be uploaded on each system boot i.e. it isn't stored on a CPU permanently; reboot and it reverts back to the old microcode. Package name "microcode_ctl" is historical, as the binary with the same name is no longer used for microcode upload and, as a result, no longer provided.
Build Time2019-05-11 14:59:10 GMT
Size1426196
0d22989f5deb040947359a12012b7680
LicenseCC0 and Redistributable, no modification permitted
Buildrootdist-c8-build-1566-148
Provides
config(microcode_ctl) = 4:20180807a-2.el8
microcode_ctl = 4:20180807a-2.el8
microcode_ctl(x86-64) = 4:20180807a-2.el8
Obsoletes No Obsoletes
Conflicts No Conflicts
Requires
/bin/bash
/bin/sh
/bin/sh
/bin/sh
/bin/sh
/bin/sh
config(microcode_ctl) = 4:20180807a-2.el8
kernel
rpmlib(CompressedFileNames) <= 3.0.4-1
rpmlib(FileDigests) <= 4.6.0-1
rpmlib(PayloadFilesHavePrefix) <= 4.0-1
rpmlib(PayloadIsXz) <= 5.2-1
systemd
systemd
systemd
Recommends No Recommends
Suggests No Suggests
Supplements No Supplements
Enhances No Enhances
Files
Page:
1 through 50 of 132 >>>
Name ascending sort Size
/etc/microcode_ctl0
/etc/microcode_ctl/ucode_with_caveats0
/lib/firmware/intel-ucode0
/usr/lib/dracut/dracut.conf.d/01-microcode.conf22
/usr/lib/dracut/dracut.conf.d/99-microcode-override.conf277
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override0
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override/module-setup.sh3810
/usr/lib/systemd/system/microcode.service284
/usr/libexec/microcode_ctl0
/usr/libexec/microcode_ctl/check_caveats11348
/usr/libexec/microcode_ctl/reload_microcode556
/usr/libexec/microcode_ctl/update_ucode6567
/usr/share/doc/microcode_ctl0
/usr/share/doc/microcode_ctl/LICENSE.intel-ucode1635
/usr/share/doc/microcode_ctl/README.caveats22853
/usr/share/doc/microcode_ctl/RELEASE_NOTES.intel-ucode7008
/usr/share/doc/microcode_ctl/caveats0
/usr/share/doc/microcode_ctl/caveats/06-4f-01_readme3394
/usr/share/doc/microcode_ctl/caveats/intel_readme2528
/usr/share/doc/microcode_ctl/disclaimer957
/usr/share/microcode_ctl0
/usr/share/microcode_ctl/intel-ucode0
/usr/share/microcode_ctl/ucode_with_caveats0
/usr/share/microcode_ctl/ucode_with_caveats/intel0
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-010
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/config496
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode0
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode/06-4f-0128672
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/readme3394
/usr/share/microcode_ctl/ucode_with_caveats/intel/config202
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode0
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-03-022048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-006144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-012048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-026144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-038192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-002048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-052048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0a6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0d6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-012048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-022048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-032048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0110240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-034096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0610240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0a6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-09-056144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-002048
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-012048
Component of No Buildroots