Mon, 21 Sep 2020 18:56:52 UTC

Information for RPM microcode_ctl-4:20180807a-2.el8.x86_64.rpm

ID10239
Namemicrocode_ctl
Version20180807a
Release2.el8
Epoch4
Archx86_64
SummaryCPU microcode updates for Intel x86 processors
DescriptionThis package provides microcode update files for Intel x86 and x86_64 CPUs. The microcode update is volatile and needs to be uploaded on each system boot i.e. it isn't stored on a CPU permanently; reboot and it reverts back to the old microcode. Package name "microcode_ctl" is historical, as the binary with the same name is no longer used for microcode upload and, as a result, no longer provided.
Build Time2019-05-11 14:59:10 GMT
Size1426196
0d22989f5deb040947359a12012b7680
LicenseCC0 and Redistributable, no modification permitted
Buildrootdist-c8-build-1566-148
Provides
config(microcode_ctl) = 4:20180807a-2.el8
microcode_ctl = 4:20180807a-2.el8
microcode_ctl(x86-64) = 4:20180807a-2.el8
Obsoletes No Obsoletes
Conflicts No Conflicts
Requires
/bin/bash
/bin/sh
/bin/sh
/bin/sh
/bin/sh
/bin/sh
config(microcode_ctl) = 4:20180807a-2.el8
kernel
rpmlib(CompressedFileNames) <= 3.0.4-1
rpmlib(FileDigests) <= 4.6.0-1
rpmlib(PayloadFilesHavePrefix) <= 4.0-1
rpmlib(PayloadIsXz) <= 5.2-1
systemd
systemd
systemd
Recommends No Recommends
Suggests No Suggests
Supplements No Supplements
Enhances No Enhances
Files
Page:
<<< 51 through 100 of 132 >>>
Name Size ascending sort
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0b-044096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-084096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0a4096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-074096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1d-014096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-054096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-074096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-0a4096
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-006144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-026144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0a6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0d6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0a6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-09-056144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-0a6144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-046144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-076144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-096144
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-046144
/usr/libexec/microcode_ctl/update_ucode6567
/usr/share/doc/microcode_ctl/RELEASE_NOTES.intel-ucode7008
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-047168
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-038192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-0c8192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-028192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-078192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-058192
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1e-059216
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-029216
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2e-069216
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-089216
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0110240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0610240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-26-0110240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5f-0110240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-0110240
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2c-0211264
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-0611264
/usr/libexec/microcode_ctl/check_caveats11348
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0612288
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0d12288
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-16-0112288
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-0512288
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2a-0712288
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3a-0913312
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-47-0113312
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-0414336
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2f-0214336
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-0a14336
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1c-0215360
Component of No Buildroots